  hR   8  c   (            b  c                             +    hisilicon,hi3670-hikey970 hisilicon,hi3670                                   +         	   7HiKey970       psci              arm,psci-0.2             =smc       cpus                         +       cpu-map    cluster0       core0            D         core1            D         core2            D         core3            D            cluster1       core0            D         core1            D         core2            D         core3            D   	            cpu@0             arm,cortex-a53           Hcpu          T                 Xpsci             f         cpu@1             arm,cortex-a53           Hcpu          T                Xpsci             f         cpu@2             arm,cortex-a53           Hcpu          T                Xpsci             f         cpu@3             arm,cortex-a53           Hcpu          T                Xpsci             f         cpu@100           arm,cortex-a73           Hcpu          T                Xpsci             f         cpu@101           arm,cortex-a73           Hcpu          T               Xpsci             f         cpu@102           arm,cortex-a73           Hcpu          T               Xpsci             f         cpu@103           arm,cortex-a73           Hcpu          T               Xpsci             f   	         interrupt-controller@e82b0000             arm,gic-400       @   T    +            +              +@             +`                  n                               	                     f         timer             arm,armv8-timer                   0                                 
            L       soc           simple-bus                       +                crg_ctrl@fff35000              hisilicon,hi3670-crgctrl syscon          T    P                             f   
      crg_rst_controller        .    hisilicon,hi3670-reset hisilicon,hi3660-reset                           
         f         pctrl@e8a09000            hisilicon,hi3670-pctrl syscon            T    蠐                          crg_ctrl@fff34000              hisilicon,hi3670-pmuctrl syscon          T    @                          sctrl@fff0a000            hisilicon,hi3670-sctrl syscon            T                                 f         iomcu@ffd7e000            hisilicon,hi3670-iomcu syscon            T                                 f         media1_crgctrl@e87ff000       #    hisilicon,hi3670-media1-crg syscon           T                              media2_crgctrl@e8900000       #    hisilicon,hi3670-media2-crg syscon           T                               reset             hisilicon,hi3660-reset                                   f   '      serial@fdf02000           arm,pl011 arm,primecell          T                             J               
      
            uartclk apb_pclk             default                       okay          	  HS-UART0          serial@fdf00000           arm,pl011 arm,primecell          T                             K               
      
            uartclk apb_pclk          	  disabled          serial@fdf03000           arm,pl011 arm,primecell          T    0                        L               
      
            uartclk apb_pclk             default                       okay          	  LS-UART0          serial@ffd74000           arm,pl011 arm,primecell          T    @                        r               
      
            uartclk apb_pclk             default                     	  disabled          serial@fdf01000           arm,pl011 arm,primecell          T                            M               
      
            uartclk apb_pclk             default                     	  disabled          serial@fdf05000           arm,pl011 arm,primecell          T    P                        N               
      
            uartclk apb_pclk          	  disabled          serial@fff32000           arm,pl011 arm,primecell          T                             O               
      
            uartclk apb_pclk             default                       okay          	  LS-UART1          gpio@e8a0b000             arm,pl061 arm,primecell          T    蠰                        T                    (            4                                            n               
   }      	   apb_pclk          K  @ TP901  GPIO_003_USB_HUB_RESET_N NC [AP_GPS_REF_CLK] [I2C3_SCL] [I2C3_SDA]        gpio@e8a0c000             arm,pl061 arm,primecell          T                            U                    (                      n               
   ~      	   apb_pclk          [  @[UART0_CTS] [UART0_RTS] [UART0_TXD] [UART0_RXD] [USER_LED5] GPIO-I [USER_LED3] [USER_LED4]        gpio@e8a0d000             arm,pl061 arm,primecell          T                            V                    (           4                               n               
         	   apb_pclk          ^  @GPIO-G [CSI0_MCLK] [CSI1_MCLK] GPIO_019_BT_ACTIVE [I2C2_SCL] [I2C2_SDA] [I2C3_SCL] [I2C3_SDA]         gpio@e8a0e000             arm,pl061 arm,primecell          T                            W                    (            4                                            n               
         	   apb_pclk          [  @GPIO_024_WIFI_ACTIVE GPIO_025_PERST_M.2 [I2C4_SCL] [I2C4_SDA] NC GPIO-H [USER_LED1] GPIO-L        gpio@e8a0f000             arm,pl061 arm,primecell          T                            X                    (           4                                n               
         	   apb_pclk          m  @GPIO-K GPIO_033_PMU1_EN GPIO_034_USBSW_SEL [SD_DAT1] [SD_DAT2] [UART1_RXD] [UART1_TXD] [SOC_GPS_UART3_CTS_N]          gpio@e8a10000             arm,pl061 arm,primecell          T                             Y                    (           4                                n               
         	   apb_pclk            @[SOC_GPS_UART3_RTS_N] [SOC_GPS_UART3_RXD] [SOC_GPS_UART3_TXD] [SOC_BT_UART4_CTS_N] [SOC_BT_UART4_RTS_N] [SOC_BT_UART4_RXD] [SOC_BT_UART4_TXD] NC          gpio@e8a11000             arm,pl061 arm,primecell          T                            Z                    (           4         "                      n               
         	   apb_pclk          d  @NC GPIO_049_USER_LED6 GPIO_050_CAN_RST GPIO_051_WIFI_EN GPIO-D GPIO-J GPIO_054_BT_EN [GPIO_055_SEL]          f   4      gpio@e8a12000             arm,pl061 arm,primecell          T                             [                    (           4          )                      n               
         	   apb_pclk          $  @[PCIE_PERST_L] NC NC NC NC NC NC NC       gpio@e8a13000             arm,pl061 arm,primecell          T    0                        \                    (           4          1                      n               
         	   apb_pclk            @NC NC NC NC NC NC NC NC       gpio@e8a14000             arm,pl061 arm,primecell          T    @                        ]                    (           4          9                      n               
         	   apb_pclk            @NC NC NC NC NC NC NC NC       gpio@e8a15000             arm,pl061 arm,primecell          T    P                        ^                    (           4          A                      n               
         	   apb_pclk            @NC NC NC NC NC NC NC NC       gpio@e8a16000             arm,pl061 arm,primecell          T    `                        _                    (           4          I                      n               
         	   apb_pclk            @NC NC NC NC NC NC NC NC       gpio@e8a17000             arm,pl061 arm,primecell          T    p                        `                    (           4          Q                      n               
         	   apb_pclk          
  @NC                gpio@e8a18000             arm,pl061 arm,primecell          T    血                        a                    (                      n               
         	   apb_pclk            @              gpio@e8a19000             arm,pl061 arm,primecell          T    衐                        b                    (                      n               
         	   apb_pclk            @              gpio@e8a1a000             arm,pl061 arm,primecell          T    衠                        c                    (                      n               
         	   apb_pclk            @              gpio@e8a1b000             arm,pl061 arm,primecell          T    衰                        d                    (           4                                 n               
         	   apb_pclk          m  @[WL_SDIO_CLK] [WL_SDIO_CMD] [WL_SDIO_DATA0] [WL_SDIO_DATA1] [WL_SDIO_DATA2] [WL_SDIO_DATA3] [ETH_ISOLATE] NC          gpio@e8a1c000             arm,pl061 arm,primecell          T                            e                    (           4                                n               
         	   apb_pclk            @[MINI1CLK_EN] NC              gpio@fff28000             arm,pl061 arm,primecell          T                            f                    (           4         *                      n                        	   apb_pclk          n  @[SPI1_SCLK] [SPI1_DIN] [SPI1_DOUT] [SPI1_CS] [POWER_INT_N] [CDMA_GPS_SYNC] GPIO_150_PEX_INTA GPIO_151_CAN_INT         gpio@fff29000             arm,pl061 arm,primecell          T                            g                    (           4          =                      n                        	   apb_pclk            @              gpio@e8a1f000             arm,pl061 arm,primecell          T                            h                    (           4                                 n               
         	   apb_pclk          d  @[SD_CLK] [SD_CMD] [SD_DATA0] [SD_DATA1] [SD_DATA2] [SD_DATA3] GPIO_166_ETHCLK_EN GPIO_167_USER_LED2       gpio@e8a20000             arm,pl061 arm,primecell          T                             i                    (           4                                n               
         	   apb_pclk          *  @GPIO_168_GPS_EN GPIO-C GPIO-E GPIO-B              gpio@fff0b000             arm,pl061 arm,primecell          T                            j                    (           4                                n                        	   apb_pclk          g  @[PMU_PWR_HOLD] GPIO_177_WL_WAKEUP_AP [JTAG_TCK] [JTAG_TMS] [JTAG_TDI] [JTAG_TMS] GPIO_182_FATAL_ERR NC           f   &      gpio@fff0c000             arm,pl061 arm,primecell          T                            k                    (           4                                n                        	   apb_pclk          m  @GPIO_184_JTAG_SEL GPIO-F [I2C0_SCL] [I2C0_SDA] [GPIO_188_I2C1_SCL] [GPIO_189_I2C1_SDA] [I2C1_SCL] [I2C2_SDA]          gpio@fff0d000             arm,pl061 arm,primecell          T                            l                    (           4                                n                        	   apb_pclk          <  @[SD_LED] NC [PCM_DI] [PCM_DO] [PCM_CLK] [PCM_FS]  [I2S2_DO]       gpio@fff0e000             arm,pl061 arm,primecell          T                            m                    (           4                                n                        	   apb_pclk            @[I2S2_XCLK] [I2S2_XFS] GPIO_202_PERST_ETH GPIO_203_PWRON_DET GPIO_204_PMU1_IRQ_N GPIO_205_SD_DET GPIO_206_GPS_MOTION_INT GPIO_207_HDMI_SEL           f         gpio@fff0f000             arm,pl061 arm,primecell          T                            n                    (           4                                n                        	   apb_pclk          G  @GPIO-A GPIO_209_VBUS_TYPEC NC NC NC [SPI0_SCLK] [SPI0_DIN] [SPI0_DOUT]        gpio@fff10000             arm,pl061 arm,primecell          T                             o                    (           4                               n                        	   apb_pclk          |  @[SPI0_CS] GPIO_217_HDMI_PD GPIO_218_GPS_WAKEUP_AP GPIO_219_M.2CLK_EN GPIO_220_PERST_MINI GPIO_221_CC_INT [PCIE_CLKREQ_L] NC       gpio@fff1d000             arm,pl061 arm,primecell          T                                                (           4         #                      n                        	   apb_pclk          i  @[PMU0_INT] [SPMI_DATA] [SPMI_CLK] [CAN_SPI_CLK] [CAN_SPI_DI] [CAN_SPI_DO] [CAN_SPI_CS] GPIO_231_HDMI_INT             f   3      ufs@ff3c0000          #    hisilicon,hi3670-ufs jedec,ufs-2.1            T    <             >                                                   
      
            ref_clk phy_clk         P                        ^                 erst       dwmmc1@ff37f000       2    hisilicon,hi3670-dw-mshc hisilicon,hi3660-dw-mshc            T    7                             +                                   
      
            ciu biu           0         ^                 ereset           q                      okay                                                                                                         default                                         !      dwmmc2@fc183000       2    hisilicon,hi3670-dw-mshc hisilicon,hi3660-dw-mshc            T    0                             +                                   
      
            ciu biu           0         ^                 ereset                      okay                        (         6         @         default            "   #   $           %   wlcore@2          
    ti,wl1837            T               &                        i2c@ffd71000              snps,designware-i2c          T                            v                        +                                      ^   '                default            (   )      	  disabled          i2c@ffd72000              snps,designware-i2c          T                             w                        +                                     ^   '                default            *   +      	  disabled          i2c@ffd73000              snps,designware-i2c          T    0                        x                        +                                     ^   '                default            ,   -      	  disabled          i2c@fdf0c000              snps,designware-i2c          T                            Q                        +                          
           ^      x            default            .   /      	  disabled          i2c@fdf0d000              snps,designware-i2c          T                            R                        +                          
           ^      x            default            0   1      	  disabled          gpio-range          S            f   2      pinmux@e896c000           pinctrl-single           T           ,        t                                                2       R             f      uart0-pins             T      X            f         uart2-pins                                         f         uart3-pins              d      h      l      p            f         uart4-pins              t      x      |                  f         uart6-pins             \      `            f         i2c3-pins                                f   .      i2c4-pins              <      @            f   0      cam0-rst-pins                       cam1-rst-pins              H          cam0-pwd-n-pins                      cam1-pwd-n-pins            D          isp0-pins                    $      (         isp1-pins                    ,      0            pinmux@fff11000           pinctrl-single           T           <                   t                                     2       .             f      pwr-key-pins               d          pd-pins                      i2s2-pins               P      T      X      \         spi0-pins                                          spi2-pins                                      spi3-pins              ,     0     4     8         i2c0-pins                     $            f   (      i2c1-pins              (      ,            f   *      i2c2-pins              0      4            f   ,      pcie-clkreq-pins                        gpio185-pins                        gpio185-idle-pins                           pinmux@e896c800           pinconf-single           T           ,        t                  uart0-cfg-pins             X       \                                                        6               f         uart2-cfg-pins                                                                                        6               f         uart3-cfg-pins              h       l       p       t                                                        6               f         uart4-cfg-pins              x       |                                                                      6               f         uart6-cfg-pins             `       d                                                        6                f         i2c3-cfg-pins                                                                             6               f   /      i2c4-cfg-pins              @       D                                                        6               f   1      cam0-rst-cfg-pins                                                                     6            cam1-rst-cfg-pins              L                                                        6            cam0-pwd-n-cfg-pins                                                                    6            cam1-pwd-n-cfg-pins            H                                                        6            isp0-cfg-pins                     (       ,                                                        6            isp1-cfg-pins                      0       4                                                        6               pinmux@fc182000           pinctrl-single           T             (                   t                                     2       
             f      sdio-pins         0                                                f   "         pinmux@fc182800           pinconf-single           T    (        (        t                  sdio-clk-cfg-pins                                                                       6               f   #      sdio-cfg-pins         (                                                                                        6               f   $         pinmux@ff37e000           pinctrl-single           T    7        0                   t                                     2                    f      sd-pins       0                                                f            pinmux@ff37e800           pinconf-single           T    7        0        t                  sd-clk-cfg-pins                                                                     6               f         sd-cfg-pins       (                                                                                        6               f            pinmux@fff11800           pinconf-single           T           <        t                  pwr-key-cfg-pins                                                                      6             usb-cfg-pins                                                                      6             spi0-cfg-pins                                                                                    6             spi2-cfg-pins                                                                                 6             spi3-cfg-pins             0      4      8                                                        6             spi0-clk-cfg-pins                                                                      6   @         spi2-clk-cfg-pins                                                                     6   @         spi3-clk-cfg-pins             ,                                                        6   @         i2c0-cfg-pins              L       P                                                        6               f   )      i2c1-cfg-pins              T       X                                                        6               f   +      i2c2-cfg-pins              \       `                                                        6               f   -      pcie-clkreq-cfg-pins                                                                       6             i2s2-cfg-pins               |                                                                            6             gpio185-cfg-pins               H                                                        6       p        T             gpio185-cfg-idle-pins              H                                                       6       p        T                   spmi@fff24000         #    hisilicon,kirin970-spmi-controller           T    @                             +            m      pmic@0            hisilicon,hi6421-spmi            T                 n                     	   3           regulators     ldo3            ldo3             `                        ldo4            ldo4             RH                        ldo9            ldo9                      2Z                  f   !      ldo15           ldo15            w@         -               ldo16           ldo16            w@         -                  f          ldo17           ldo17            &%         2Z      ldo33           ldo33            &%         2Z      ldo34           ldo34            '@         2Z               aliases         /soc/dwmmc1@ff37f000            /soc/dwmmc2@fc183000            /soc/serial@fdf02000            /soc/serial@fdf00000            /soc/serial@fdf03000            /soc/serial@ffd74000            /soc/serial@fdf01000            /soc/serial@fdf05000            %/soc/serial@fff32000          chosen          -serial6:115200n8          memory@0             Hmemory           T                      wlan-en-1-8v              regulator-fixed         wlan-en-regulator            w@         w@        9   4               > p         O         f   %         	compatible interrupt-parent #address-cells #size-cells model method cpu device_type reg enable-method phandle #interrupt-cells interrupts interrupt-controller clock-frequency ranges #clock-cells #reset-cells hisi,rst-syscon clocks clock-names pinctrl-names pinctrl-0 status label gpio-controller #gpio-cells gpio-ranges gpio-line-names freq-table-hz resets reset-names hisilicon,peripheral-syscon card-detect-delay bus-width sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 cap-sd-highspeed disable-wp cd-inverted cd-gpios vmmc-supply vqmmc-supply non-removable broken-cd cap-power-off-card #pinctrl-single,gpio-range-cells #pinctrl-cells #gpio-range-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,drive-strength pinctrl-single,slew-rate hisilicon,spmi-channel regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on mshc1 mshc2 serial0 serial1 serial2 serial3 serial4 serial5 serial6 stdout-path gpio startup-delay-us enable-active-high 