    8    (                                                                                   ,Sony Xperia 1 V          2sony,pdx234 qcom,sm8550          =handset    chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   *      bi-tcxo-div2-clk             V             2fixed-factor-clock           {                                        s   )      bi-tcxo-ao-div2-clk          V             2fixed-factor-clock           {                                       s            cpus                                 cpu@0            cpu          2arm,cortex-a510                           {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a510                          {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s            cpu@200          cpu          2arm,cortex-a510                          {                psci                	            
         psci                                           d        %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x3                            {               psci                                     psci                              f          L        %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   "      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   #      cpu-sleep-2-0            2arm,idle-state          _goldplus-rail-power-collapse            o@                      F          8                  s   $         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   %      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   &            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                      interconnect-0           2qcom,sm8550-clk-virt                                    s   2      interconnect-1           2qcom,sm8550-mc-virt                                 s         memory@a0000000          memory                                pmu-a510             2arm,cortex-a510-pmu                        pmu-a710             2arm,cortex-a710-pmu                        pmu-a715             2arm,cortex-a715-pmu                        pmu-x3           2arm,cortex-x3-pmu                          psci             2arm,psci-1.0             smc    power-domain-cpu0                           !        *   "         s         power-domain-cpu1                           !        *   "         s         power-domain-cpu2                           !        *   "         s   
      power-domain-cpu3                           !        *   #         s         power-domain-cpu4                           !        *   #         s         power-domain-cpu5                           !        *   #         s         power-domain-cpu6                           !        *   #         s         power-domain-cpu7                           !        *   $         s         power-domain-cluster                        *   %   &         s   !         reserved-memory                                   =   hyp-region@80000000                                 D      cpusys-vm-region@80a00000                       @           D      hyp-tags-region@80e00000                        =           D      xbl-sc-region@d8100000                                 D      hyp-tags-reserved-region@811d0000                                  D      xbl-dt-log-merged-region@81a00000                       &           D      aop-cmd-db-region@81c60000           2qcom,cmd-db                                D      aop-config-merged-region@81c80000                       @          D      smem@81d00000         
   2qcom,smem                                  K   '            D      adsp-mhi-region@81f00000                                   D      global-sync-region@82600000              `                  D      tz-stat-region@82700000              p                  D      cdsp-secure-heap-region@82800000                       `           D      q6-mpss-dtb-region@9b000000                                 D         s         ipa-fw-region@9b080000                                 D      ipa-gsi-region@9b090000              	                  D      gpu-micro-code-region@9b09a000               	                  D         s         spss-region@9b100000                                   D      spu-tz-shared-region@9b280000                (                  D      spu-modem-shared-region@9b2e0000                 .                  D      camera-region@9b300000               0                  D      video-region@9bb00000                       p           D      cvp-region@9c200000                      p           D      cdsp-region@9c900000                                   D         s         q6-cdsp-dtb-region@9e900000                                D         s         q6-adsp-dtb-region@9e980000                                D         s         adspslpi-region@9ea00000                                  D         s         mpss-dsm-region@d4d00000                       0           D         s         tz-reserved-region@d8000000                                 D      cpucp-fw-region@d8140000                                   D      qtee-region@d8300000                 0       P           D      ta-region@d8800000               ؀                 D      tz-tags-region@e1200000                     t           D      hwfence-shbuf-region@e6440000                D       -          D      trust-ui-vm-region@f3600000              `                D      trust-ui-vm-dump-region@f80ee000                                  D      trust-ui-vm-qrt-region@f80ef000                               D      trust-ui-vm-vblk0-ring-region@f80f8000                      @          D      trust-ui-vm-vblk1-ring-region@f80fc000                      @          D      trust-ui-vm-swiotlb-region@f8100000                                D      oem-vm-region@f8400000               @                 D      oem-vm-vblk0-ring-region@fcc00000                        @          D      oem-vm-swiotlb-region@fcc04000               @                 D      hyp-ext-tags-region@fce00000                                  D      hyp-ext-reserved-region@ff700000                 p                  D      mpss-region@89800000                                  D         s         splash@b8000000                                D      memory@f8b00000          2qcom,rmtfs-mem                      (           D        S           b         ramoops@ffd00000             2ramoops                               l           y                               rdtag-store-region@ffdc0000                                D         smp2p-adsp           2qcom,smp2p                         (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p             ^             (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-modem          2qcom,smp2p                         (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                              s            soc@0            2simple-bus          =                               )                                                   clock-controller@100000          2qcom,sm8550-gcc                      B          V           4                    <   {   )   *   +   ,       ,      -       -      -      .             s   0      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                      A            s   (      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         M                                        L         M         N         O         P         Q         R         S         T         U         V         W           X           e   >        v   /  6             }        okay             s   5      geniqup@8c0000           2qcom,geni-se-qup                                     =        m-ahb s-ahb          {   0      0           v   /  #             }                                 okay       i2c@880000           2qcom,geni-i2c                         @         se           {   0   o        default            1              u                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5              5                  tx rx         	  disabled          spi@880000           2qcom,geni-spi                         @         se           {   0   o              u           default            6   7      H     2          2          3          4                                   qup-core qup-config qup-memory              5              5                  tx rx                                   	  disabled          i2c@884000           2qcom,geni-i2c                 @       @         se           {   0   q        default            8              G                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  disabled          spi@884000           2qcom,geni-spi                 @       @         se           {   0   q              G           default            9   :      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  disabled          i2c@888000           2qcom,geni-i2c                        @         se           {   0   s        default            ;              H                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx           okay             c B@      spi@888000           2qcom,geni-spi                        @         se           {   0   s              H           default            <   =      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  disabled          i2c@88c000           2qcom,geni-i2c                        @         se           {   0   u        default            >              I                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx           okay             c B@   speaker-amp@30           2cirrus,cs35l45              0           ?                 ?                                cirrus,gpio-ctrl2                       speaker-amp@31           2cirrus,cs35l45              1           ?                 ?                                cirrus,gpio-ctrl2                          spi@88c000           2qcom,geni-spi                        @         se           {   0   u              I           default            @   A      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  disabled          i2c@890000           2qcom,geni-i2c                         @         se           {   0   w        default            B              J                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  disabled          spi@890000           2qcom,geni-spi                         @         se           {   0   w              J           default            C   D      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  disabled          i2c@894000           2qcom,geni-i2c                 @       @         se           {   0   y        default            E              K                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  disabled          spi@894000           2qcom,geni-spi                 @       @         se           {   0   y              K           default            F   G      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  disabled          serial@898000            2qcom,geni-uart                       @         se           {   0   {        default            H   I                       0     2          2          3          4               qup-core qup-config       	  disabled          i2c@89c000           2qcom,geni-i2c                        @         se           {   0   }        default            J                                                 H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  disabled          spi@89c000           2qcom,geni-spi                        @         se           {   0   }                         default            K   L      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  disabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 s-ahb            {   0   Z                                  =        okay       i2c@980000           2qcom,geni-i2c-master-hub                          @         se core          {   0   F   0   E        default            M                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @         se core          {   0   H   0   E        default            N                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@988000           2qcom,geni-i2c-master-hub                         @         se core          {   0   J   0   E        default            O                                                 0     2           2          3          4               qup-core qup-config         okay             c    pmic@75          2dlg,slg51000                u           P                  Q        default    regulators     ldo1            %slg51000_a_ldo1         4 $         L 2Z      ldo2            %slg51000_a_ldo2         4 $         L 2Z      ldo3            %slg51000_a_ldo3         4 O        L 98p      ldo4            %slg51000_a_ldo4         4 O        L 98p      ldo5            %slg51000_a_ldo5         4          L O      ldo6            %slg51000_a_ldo6         4          L O      ldo7            %slg51000_a_ldo7         4 O        L 98p               i2c@98c000           2qcom,geni-i2c-master-hub                         @         se core          {   0   L   0   E        default            R                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@990000           2qcom,geni-i2c-master-hub                          @         se core          {   0   N   0   E        default            S                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @         se core          {   0   P   0   E        default            T                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@998000           2qcom,geni-i2c-master-hub                         @         se core          {   0   R   0   E        default            U                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @         se core          {   0   T   0   E        default            V                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @         se core          {   0   V   0   E        default            W                                                 0     2           2          3          4               qup-core qup-config       	  disabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         se core          {   0   X   0   E        default            X                                                 0     2           2          3          4               qup-core qup-config       	  disabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         M                                                                                              %         &         '         (         )         *           X           e           v   /                }        okay             s   [      geniqup@ac0000           2qcom,geni-se-qup                                     =        m-ahb s-ahb          {   0      0           v   /                  2          2             	  qup-core             }                                 okay       i2c@a80000           2qcom,geni-i2c                         @         se           {   0   ]        default            Y              a                                   H     2          2          3          4          Z                         qup-core qup-config qup-memory              [              [                  tx rx           okay             c B@      spi@a80000           2qcom,geni-spi                         @         se           {   0   ]              a           default            \   ]      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [              [                  tx rx                                   	  disabled          i2c@a84000           2qcom,geni-i2c                 @       @         se           {   0   _        default            ^              b                                   H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  disabled          spi@a84000           2qcom,geni-spi                 @       @         se           {   0   _              b           default            _   `      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          i2c@a88000           2qcom,geni-i2c                        @         se           {   0   a        default            a              c                                   H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  disabled          spi@a88000           2qcom,geni-spi                        @         se           {   0   a              c           default            b   c      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          i2c@a8c000           2qcom,geni-i2c                        @         se           {   0   c        default            d              d                                   H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx         	  disabled          spi@a8c000           2qcom,geni-spi                        @         se           {   0   c              d           default            e   f      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          i2c@a90000           2qcom,geni-i2c                         @         se           {   0   e        default            g              e                                   H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx           okay             c       spi@a90000           2qcom,geni-spi                         @         se           {   0   e              e           default            h   i      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          i2c@a94000           2qcom,geni-i2c                 @       @         se           {   0   g        default            j              f         H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          spi@a94000           2qcom,geni-spi                 @       @         se           {   0   g              f           default            k   l      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          i2c@a98000           2qcom,geni-i2c                        @         se           {   0   i        default            m              k         H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          spi@a98000           2qcom,geni-spi                        @         se           {   0   i              k           default            n   o      H     2          2          3          4          Z                         qup-core qup-config qup-memory              [             [                 tx rx                                   	  disabled          serial@a9c000            2qcom,geni-debug-uart                         @         se           {   0   k        default            p              C           qup-core qup-config       0     2          2          3          4               okay             interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                s   r      interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 s   4      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     {   0       0   
                     s   q      interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     {   0      0                        s   Z      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            {                           s         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        s         rng@10c3000          2qcom,sm8550-trng qcom,trng               0              pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 dparf dbi elbi atu config                                   8  =               `                 `0      `0                n                }        x                     `                                                                                        (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                                 8   {   0   "   0   $   0   %   0   *   0   +   0      0          =  aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     q                    3          r               pcie-mem cpu-pcie                   s            s                     /            /                0           pci             0               +        pciephy         okay               ?   `               ?   ^              t        default    pcie@0           pci                                      n                                        =         phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   {   0   "   0   $          0   &   0   (        aux cfg_ahb ref rchng pipe             0           phy            0   &                     0            V            4pcie0_pipe_clk          G            okay            R   u        b   v         s   +      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 dparf dbi elbi atu config                                   8  =               @                 @0      @0                n                }        x                    `        3         4         5         8         9         :         v         w         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                             @   {   0   ,   0   .   0   /   0   6   0   7   0      0       0         I  aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               0   ,        $       0     q                    3          r   	            pcie-mem cpu-pcie                   s           s                     /           /                0      0   	        pci link_down               0              ,        pciephy       	  disabled       pcie@0           pci                                      n                                        =         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   {   0   0   0   .         0   2   0   4        aux cfg_ahb ref rchng pipe             0      0   
        phy phy_nocsr              0   2                     0            V           4pcie1_pipe_clk          G          	  disabled             s   ,      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                M           r            z                               v   /         /               s   w      crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `            w      w           rx tx           v   /         /                                          memory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 {          0                 ref ref_aux qref                0              x            ufsphy           V           G          	  disabled             s   -      ufs@1d84000       +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	              -        ufsphy                     4              0           rst             0              y        v   /   `             }           z      0     Z                    3          4   #            ufs-ddr cpu-ufs       n  core_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   {   0      0      0      0            0      0      0              {      	  disabled             s   x   opp-table            2operating-points-v2          s   z   opp-75000000          @      xh                    xh                                           |      opp-150000000         @      р                    р                                           }      opp-300000000         @                                                                       y            crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                 {   0            s   {      hwlock@1f40000           2qcom,tcsr-mutex                                           s   '      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                {                V           4            s         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  dkgsl_3d0_reg_memory cx_mem cx_dbgc                ,           v   ~           ~                                     %         	  disabled             s      zap-shader          
         opp-table            2operating-points-v2          s      opp-680000000               (                  opp-615000000               $'                 opp-550000000                U                 opp-475000000               O           P      opp-401000000               @           @      opp-348000000                           <      opp-295000000               W           8      opp-220000000                           4            gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 dgmu rscc gmu_pdc                  0         1           hfi gmu       8   {                      0      0                      !  ahb gmu cxo axi memnoc hub demet                                   cx gx           v   ~               "                       s      opp-table            2operating-points-v2          s      opp-500000000               e                  opp-200000000                           @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  {   )   0      0            V           4                       s         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                               +           8        8                                                                                                                                      >         ?         @         A                                                                                     {         0       0   !               hlos bus iface ahb                           }         s   ~      ipa@3f40000          2qcom,sm8550-ipa         v   /         /            0                            P     @               dipa-reg ipa-shared gsi        8                                                   (  ipa gsi ipa-clock-query ipa-setup-ready          {              core          0                         3          4               memory config           "           K                   *  \ipa-clock-enabled-valid ipa-clock-enabled         	  disabled          remoteproc@4080000           2qcom,sm8550-mpss-pas                                L                                                                  0  wdog fatal ready handover stop-ack shutdown-ack          {               xo                                 cx mss                                       
                 "           K               \stop          	  disabled       glink-edge             (                     (               rmpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas                                <                                                      #  wdog fatal ready handover stop-ack           {               xo                                lcx lmx                                      
              "           K               \stop            okay          B  xqcom/sm8550/Sony/yodo/adsp.mbn qcom/sm8550/Sony/yodo/adsp_dtb.mbn      glink-edge             (                     (               rlpass                 fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           radsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                     v   /        /  c             }      compute-cb@4             2qcom,fastrpc-compute-cb                     v   /        /  d             }      compute-cb@5             2qcom,fastrpc-compute-cb                     v   /        /  e             }      compute-cb@6             2qcom,fastrpc-compute-cb                     v   /        /  f             }      compute-cb@7             2qcom,fastrpc-compute-cb                     v   /        /  g             }         gpr       	   2qcom,gpr          
  adsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd    dais             2qcom,q6apm-dais         v   /        /  a          bedais           2qcom,q6apm-lpass-dais                       service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              mclk macro dcodec fsgen          V          
  4wsa2-mclk                       s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                    {           iface           rWSA2                       default                       	            ?   ?                            (           ;           M           ^           u                                                                           	  disabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   {      @         f         g              mclk macro dcodec fsgen          V            4mclk                        s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                    {           iface           rRX                     default                                  ?                              (             ;        M        ^        u                                                                    	  disabled          codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   {      9         f         g              mclk macro dcodec fsgen          V            4mclk                        s         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              mclk macro dcodec fsgen          V            4mclk                        s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                    {           iface           rWSA                    default                       	            ?   ?                            (           ;           M           ^           u                                                                           	  disabled          soundwire@6d30000            2qcom,soundwire-v2.0.0                                                           core wakeup          {           iface           rTX                     default                                                  (            ;        M        ^        u                                                             	  disabled          codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   {      9         f         g           mclk macro dcodec            V            4fsgen                       s         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                                                            {      f         g           core audio           s      tx-swr-active-state          s      clk-pins            gpio0           swr_tx_clk                     #            -      data-pins           gpio1 gpio2 gpio14          swr_tx_data                    #            :         rx-swr-active-state          s      clk-pins            gpio3           swr_rx_clk                     #            -      data-pins           gpio4 gpio5         swr_rx_data                    #            :         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk                       H      data-pins           gpio7           dmic1_data                      T         dmic23-default-state       clk-pins            gpio8         
  dmic2_clk                       H      data-pins           gpio9           dmic2_data                      T         wsa-swr-active-state             s      clk-pins            gpio10          wsa_swr_clk                    #            -      data-pins           gpio11          wsa_swr_data                       #            :         wsa2-swr-active-state            s      clk-pins            gpio15          wsa2_swr_clk                       #            -      data-pins           gpio16          wsa2_swr_data                      #            :            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        s         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                      mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                            hc_irq pwr_irq           {   0      0                  iface core xo           v   /  @            a d,        qh                                 0                         3          4               sdhc-ddr cpu-sdhc                       }                       okay                                                          default sleep                                              opp-table            2operating-points-v2          s      opp-19200000                $                  opp-50000000                           |      opp-100000000                           }      opp-202000000               
F                       clock-controller@aaf0000             2qcom,sm8550-videocc              
                  {   )   0                             |         V           4                    cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
P                                                 {                          camnoc_axi cpas_ahb cci                                     default sleep         	  disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
`                                                 {                  
        camnoc_axi cpas_ahb cci                               default sleep         	  disabled                                 i2c-bus@0                         c B@                                   cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
p                                                 {                          camnoc_axi cpas_ahb cci                                     default sleep         	  disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   clock-controller@ade0000             2qcom,sm8550-camcc                
                  {   0      )      *                          |         V           4                       s         display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 dmdss                   S                                 {         0      0         =                                                                 	  mdp0-mem            v   /                                        =      	  disabled             s      display-controller@ae01000           2qcom,sm8550-dpu               
           
               	  dmdp vbif                                   0   {   0      0               @      =      I      !  bus nrt_bus iface lut core vsync                                 I        $               ports                                port@0                  endpoint                        s            port@1                 endpoint                        s            port@2                 endpoint                        s               opp-table            2operating-points-v2          s      opp-200000000                           |      opp-325000000               _@           }      opp-375000000               Z                 opp-514000000                          y            displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                      (   {                                    ;  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel                                 .      .              .           dp                                              	  disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                        s               opp-table            2operating-points-v2          s      opp-162000000               	                 opp-270000000               ߀           |      opp-540000000                /                  opp-810000000               0G           y            dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  ddsi_ctrl                                  0   {                  B      8         0         $  byte byte_intf pixel core iface bus                                    C                                                   dsi                                 	  disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                opp-table            2operating-points-v2          s      opp-187500000               -           |      opp-300000000                           }      opp-358000000               V                       phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                ddsi_phy dsi_phy_lane dsi_pll             {                   
  iface ref            V           G          	  disabled             s         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  ddsi_ctrl                                  0   {                  D      :         0         $  byte byte_intf pixel core iface bus                              	      E                                                   dsi                                 	  disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                ddsi_phy dsi_phy_lane dsi_pll             {                   
  iface ref            V           G          	  disabled             s            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   {   )      0      *                             .      .                                                     |         V           4                       s         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T        G             {              ref            0           okay               u        	   v                    s         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           {   0             0      0           aux ref com_aux usb3_pipe               0              0      0           phy common           V           G            	        okay            R   v        b            s   .   ports                                port@0                  endpoint                        s            port@1                 endpoint                        s            port@2                 endpoint                        s                  usb@a6f8800          2qcom,sm8550-dwc3 qcom,dwc3               
o                                          =      0   {   0      0      0      0      0               &  cfg_noc core iface sleep mock_utmi xo              0      0           $        D                                                             <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             0              y           0         0     Z                    3          4   $            usb-ddr apps-usb            okay       usb@a600000       
   2snps,dwc3                
`                                   v   /   @                  .            usb2-phy usb3-phy           	)             	=         	Z         	s         	         	         	         	         	         	         
         }         
#   ports                                port@0                  endpoint                        s            port@1                 endpoint                        s                     interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  
3         ^   ^  a      }   ?      ~                                                        s         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                 
C                                     uplow critical          
Q            s         thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                
C                                     uplow critical          
Q            s         thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                
C                                     uplow critical          
Q            s         power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      (           (                      (                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         dcore chnls obsrvr intr cnfg         periph_irq                           r            
g            
t                                                     pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
Q             s            pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
Q             s            pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                                                                                    s      volume-down-n-state         gpio6           normal          
            
         T         s         sd-card-det-n-state         gpio12          normal          
            
         
         T         s            led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                       okay       led-0           flash           
            
              
          
 B@        
                    led-1           flash           
           
              
          
 B@        
                      pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm                     	  disabled             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                                                                                       s      snapshot-n-state            gpio7           normal          
            
         T         s         focus-n-state           gpio8           normal          
            
         T         s            phy@fd00             2qcom,pm8550b-eusb2-repeater                     G            "           <           U           j           w            s            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                                                                      s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
Q             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                   P                                                   s   P   cam-pwr-a-cs-state          gpio4           normal          
                                         s   Q            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  dhlos pbs       pwrkey           2qcom,pmk8350-pwrkey                                 t        okay          resin            2qcom,pmk8350-resin                               okay               s         rtc@6100             2qcom,pmk8350-rtc               a   b       
  drtc alarm                  b            nvram@7100           2qcom,spmi-sdam             q                                  =      q       reboot-reason@48                H                          s            gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                                                                       s               pinctrl@f100000          2qcom,sm8550-tlmm                        0                                                                       ?                                              s   ?   cci0-0-default-state             s      sda-pins            gpio110         cci_i2c_sda                    
        scl-pins            gpio111         cci_i2c_scl                    
           cci0-0-sleep-state           s      sda-pins            gpio110         cci_i2c_sda                     
      scl-pins            gpio111         cci_i2c_scl                     
         cci0-1-default-state             s      sda-pins            gpio112         cci_i2c_sda                    
        scl-pins            gpio113         cci_i2c_scl                    
           cci0-1-sleep-state           s      sda-pins            gpio112         cci_i2c_sda                     
      scl-pins            gpio113         cci_i2c_scl                     
         cci1-0-default-state             s      sda-pins            gpio114         cci_i2c_sda                    
        scl-pins            gpio115         cci_i2c_scl                    
           cci1-0-sleep-state           s      sda-pins            gpio114         cci_i2c_sda                     
      scl-pins            gpio115         cci_i2c_scl                     
         cci2-0-default-state             s      sda-pins            gpio74          cci_i2c_sda                    
        scl-pins            gpio75          cci_i2c_scl                    
           cci2-0-sleep-state           s      sda-pins            gpio74          cci_i2c_sda                     
      scl-pins            gpio75          cci_i2c_scl                     
         cci2-1-default-state             s      sda-pins            gpio0           cci_i2c_sda                    
        scl-pins            gpio1           cci_i2c_scl                    
           cci2-1-sleep-state           s      sda-pins            gpio0           cci_i2c_sda                     
      scl-pins            gpio1           cci_i2c_scl                     
         hub-i2c0-data-clk-state         gpio16 gpio17           i2chub0_se0                     
         s   M      hub-i2c1-data-clk-state         gpio18 gpio19           i2chub0_se1                     
         s   N      hub-i2c2-data-clk-state         gpio20 gpio21           i2chub0_se2                     
         s   O      hub-i2c3-data-clk-state         gpio22 gpio23           i2chub0_se3                     
         s   R      hub-i2c4-data-clk-state         gpio4 gpio5         i2chub0_se4                     
         s   S      hub-i2c5-data-clk-state         gpio6 gpio7         i2chub0_se5                     
         s   T      hub-i2c6-data-clk-state         gpio8 gpio9         i2chub0_se6                     
         s   U      hub-i2c7-data-clk-state         gpio10 gpio11           i2chub0_se7                     
         s   V      hub-i2c8-data-clk-state         gpio206 gpio207         i2chub0_se8                     
         s   W      hub-i2c9-data-clk-state         gpio84 gpio85           i2chub0_se9                     
         s   X      pcie0-default-state          s   t   perst-pins          gpio94          gpio                        
      clkreq-pins         gpio95          pcie0_clk_req_n                     
      wake-pins           gpio96          gpio                        
         pcie1-default-state    perst-pins          gpio97          gpio                        
      clkreq-pins         gpio98          pcie1_clk_req_n                     
      wake-pins           gpio99          gpio                        
         qup-i2c0-data-clk-state         gpio28 gpio29         	  qup1_se0                       
           s   Y      qup-i2c1-data-clk-state         gpio32 gpio33         	  qup1_se1                       
           s   ^      qup-i2c2-data-clk-state         gpio36 gpio37         	  qup1_se2                       
           s   a      qup-i2c3-data-clk-state         gpio40 gpio41         	  qup1_se3                       
           s   d      qup-i2c4-data-clk-state         gpio44 gpio45         	  qup1_se4                       
           s   g      qup-i2c5-data-clk-state         gpio52 gpio53         	  qup1_se5                       
           s   j      qup-i2c6-data-clk-state         gpio48 gpio49         	  qup1_se6                       
           s   m      qup-i2c8-data-clk-state          s   1   scl-pins            gpio57          qup2_se0_l1_mira                       
        sda-pins            gpio56          qup2_se0_l0_mira                       
           qup-i2c9-data-clk-state         gpio60 gpio61         	  qup2_se1                       
           s   8      qup-i2c10-data-clk-state            gpio64 gpio65         	  qup2_se2                       
           s   ;      qup-i2c11-data-clk-state            gpio68 gpio69         	  qup2_se3                       
           s   >      qup-i2c12-data-clk-state            gpio2 gpio3       	  qup2_se4                       
           s   B      qup-i2c13-data-clk-state            gpio80 gpio81         	  qup2_se5                       
           s   E      qup-i2c15-data-clk-state            gpio72 gpio106        	  qup2_se7                       
           s   J      qup-spi0-cs-state           gpio31        	  qup1_se0                        -         s   ]      qup-spi0-data-clk-state         gpio28 gpio29 gpio30          	  qup1_se0                        -         s   \      qup-spi1-cs-state           gpio35        	  qup1_se1                        -         s   `      qup-spi1-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se1                        -         s   _      qup-spi2-cs-state           gpio39        	  qup1_se2                        -         s   c      qup-spi2-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se2                        -         s   b      qup-spi3-cs-state           gpio43        	  qup1_se3                        -         s   f      qup-spi3-data-clk-state         gpio40 gpio41 gpio42          	  qup1_se3                        -         s   e      qup-spi4-cs-state           gpio47        	  qup1_se4                        -         s   i      qup-spi4-data-clk-state         gpio44 gpio45 gpio46          	  qup1_se4                        -         s   h      qup-spi5-cs-state           gpio55        	  qup1_se5                        -         s   l      qup-spi5-data-clk-state         gpio52 gpio53 gpio54          	  qup1_se5                        -         s   k      qup-spi6-cs-state           gpio51        	  qup1_se6                        -         s   o      qup-spi6-data-clk-state         gpio48 gpio49 gpio50          	  qup1_se6                        -         s   n      qup-spi8-cs-state           gpio59          qup2_se0_l3_mira                        -         s   7      qup-spi8-data-clk-state         gpio56 gpio57 gpio58            qup2_se0_l2_mira                        -         s   6      qup-spi9-cs-state           gpio63        	  qup2_se1                        -         s   :      qup-spi9-data-clk-state         gpio60 gpio61 gpio62          	  qup2_se1                        -         s   9      qup-spi10-cs-state          gpio67        	  qup2_se2                        -         s   =      qup-spi10-data-clk-state            gpio64 gpio65 gpio66          	  qup2_se2                        -         s   <      qup-spi11-cs-state          gpio71        	  qup2_se3                        -         s   A      qup-spi11-data-clk-state            gpio68 gpio69 gpio70          	  qup2_se3                        -         s   @      qup-spi12-cs-state          gpio119       	  qup2_se4                        -         s   D      qup-spi12-data-clk-state            gpio2 gpio3 gpio118       	  qup2_se4                        -         s   C      qup-spi13-cs-state          gpio83        	  qup2_se5                        -         s   G      qup-spi13-data-clk-state            gpio80 gpio81 gpio82          	  qup2_se5                        -         s   F      qup-spi15-cs-state          gpio75        	  qup2_se7                        -         s   L      qup-spi15-data-clk-state            gpio72 gpio106 gpio74         	  qup2_se7                        -         s   K      qup-uart7-default-state         gpio26 gpio27         	  qup1_se7                        -         s   p      qup-uart14-default-state            gpio78 gpio79         	  qup2_se6                        
         s   H      qup-uart14-cts-rts-state            gpio76 gpio77         	  qup2_se6                        
         s   I      sdc2-sleep-state             s      clk-pins          	  sdc2_clk             -                 cmd-pins          	  sdc2_cmd             
                 data-pins         
  sdc2_data            
                    sdc2-default-state           s      clk-pins          	  sdc2_clk             -                 cmd-pins          	  sdc2_cmd             
           
      data-pins         
  sdc2_data            
           
            iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                 +           8                 A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                   }         s   /      interrupt-controller@17100000            2arm,gic-v3                                                =                                                            	                                     s      msi-controller@17140000          2arm,gic-v3-its                                                      s   s         timer@17420000           2arm,armv7-timer-mem              B                 =                                            frame@17421000           B    B             +                                      frame@17423000           B0            +                  	         	  disabled          frame@17425000           BP            +                  
         	  disabled          frame@17427000           Bp            +                           	  disabled          frame@17429000           B            +                           	  disabled          frame@1742b000           B            +                           	  disabled          frame@1742d000           B            +                           	  disabled             rsc@17a00000          	  rapps_rsc             2qcom,rpmh-rsc         @                                                               ddrv-0 drv-1 drv-2 drv-3       $                                        8           H            T                                      !   bcm-voter            2qcom,bcm-voter           s          clock-controller             2qcom,sm8550-rpmh-clk             V           xo           {            s         power-controller             2qcom,sm8550-rpmhpd                                 s      opp-table            2operating-points-v2          s      opp-16                   opp-48             0         s         opp-52             4      opp-56             8         s         opp-60             <      opp-64             @         s   |      opp-80             P      opp-128                     s   }      opp-144                  opp-192                     s         opp-256                     s   y      opp-320           @      opp-336           P      opp-384                 opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators         db      bob1            %pm8550_bob1         4 4        L <l        q         ldo1          
  %pm8550_l1           4 w@        L w@        q         ldo2          
  %pm8550_l2           4 -         L -         q         ldo5          
  %pm8550_l5           4 /]         L /]         q            s         ldo6          
  %pm8550_l6           4 w@        L -         q         ldo7          
  %pm8550_l7           4 w@        L -         q         ldo8          
  %pm8550_l8           4 w@        L -         q            s         ldo9          
  %pm8550_l9           4 -*        L -         q            s         ldo10           %pm8550_l10          4 w@        L w@        q         ldo11           %pm8550_l11          4 O        L          q         ldo12           %pm8550_l12          4 w@        L w@        q         ldo13           %pm8550_l13          4 -        L -        q         ldo14           %pm8550_l14          4 2j@        L 2j@        q         ldo15           %pm8550_l15          4 w@        L w@        q            s         ldo16           %pm8550_l16          4 *        L *        q         ldo17           %pm8550_l17          4 &5@        L &5@        q            regulators-1             2qcom,pm8550vs-rpmh-regulators           dc      ldo1            %pm8550vs_0_l1           4 O        L O        q         ldo3            %pm8550vs_0_l3           4 m        L         q            regulators-2             2qcom,pm8550vs-rpmh-regulators           dd      ldo1            %pm8550vs_1_l1           4 m        L 	        q            regulators-3             2qcom,pm8550vs-rpmh-regulators           de      smps4           %pm8550vs_2_s4           4 @        L         q         smps5           %pm8550vs_2_s5           4 iP        L          q         ldo1            %pm8550vs_2_l1           4 m        L         q            s   u      ldo2            %pm8550vs_2_l2           4 m        L @        q         ldo3            %pm8550vs_2_l3           4 O        L O        q            s   v         regulators-4             2qcom,pm8550ve-rpmh-regulators           df      smps4           %pm8550ve_s4         4          L 
`        q         ldo1            %pm8550ve_l1         4         L         q         ldo2            %pm8550ve_l2         4 m        L         q         ldo3            %pm8550ve_l3         4         L         q            s            regulators-5             2qcom,pm8550vs-rpmh-regulators           dg      smps1           %pm8550vs_3_s1           4 O        L          q         smps2           %pm8550vs_3_s2           4          L         q         smps3           %pm8550vs_3_s3           4         L Q        q         smps4           %pm8550vs_3_s4           4 O        L @        q         smps5           %pm8550vs_3_s5           4          L Q        q         smps6           %pm8550vs_3_s6           4 w@        L         q         ldo1            %pm8550vs_3_l1           4 t        L *@        q         ldo2            %pm8550vs_3_l2           4 ؀        L O        q         ldo3            %pm8550vs_3_l3           4 O        L O        q               cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  dfreq-domain0 freq-domain1 freq-domain2           {   )   0           xo alternate          $                                      $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2                     V            s         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                       Q                                            opp-table            2operating-points-v2          s      opp-0            p      opp-1            ,h      opp-2            Z      opp-3            ci8      opp-4            y      opp-5            A      opp-6            H      opp-7            ։      opp-8            h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                      E              3         3                    opp-table            2operating-points-v2          s      opp-0            E      opp-1            l}p      opp-2                  opp-3                  opp-4            9`      opp-5            /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        s   3      system-cache-controller@25000000             2qcom,sm8550-llcc          `       %               %               %@              %`              %              %                X  dllcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base               
         interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        s         remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20               @           B                                              #  wdog fatal ready handover stop-ack           {               xo                        
               cx mxc nsp                                       
              "           K               \stop            okay          B  xqcom/sm8550/Sony/yodo/cdsp.mbn qcom/sm8550/Sony/yodo/cdsp_dtb.mbn      glink-edge             (                     (               rcdsp                  fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           rcdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                   $  v   /  a       /         /              }      compute-cb@2             2qcom,fastrpc-compute-cb                   $  v   /  b       /         /              }      compute-cb@3             2qcom,fastrpc-compute-cb                   $  v   /  c       /         /              }      compute-cb@4             2qcom,fastrpc-compute-cb                   $  v   /  d       /         /              }      compute-cb@5             2qcom,fastrpc-compute-cb                   $  v   /  e       /         /              }      compute-cb@6             2qcom,fastrpc-compute-cb                   $  v   /  f       /         /              }      compute-cb@7             2qcom,fastrpc-compute-cb                   $  v   /  g       /         /              }      compute-cb@8             2qcom,fastrpc-compute-cb                   $  v   /  h       /         /              }                  thermal-zones      aoss0-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss0-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss1-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss2-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss3-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpu3-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu3-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu4-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu4-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu5-top-thermal                  	   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu5-bottom-thermal               
   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu6-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu6-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-middle-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                aoss1-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpu0-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu1-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu2-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cdsp0-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp1-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp2-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp3-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             video-thermal                    trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             mem-thermal            
              	   trips      thermal-engine-config            H                   Epassive       ddr0-config          _                   Epassive       reset-mon-config             8                   Epassive             modem0-thermal                
   trips      thermal-engine-config            H                   Epassive       mdmss0-config0           p                   Epassive       mdmss0-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem1-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss1-config0           p                   Epassive       mdmss1-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem2-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss2-config0           p                   Epassive       mdmss2-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem3-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss3-config0           p                   Epassive       mdmss3-config1           (                   Epassive       reset-mon-config             8                   Epassive             camera0-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             camera1-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             aoss2-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             gpuss-0-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-1-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-2-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-3-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-4-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-5-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-6-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-7-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                pm8010-m-thermal               d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8010-n-thermal               d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550b-thermal            d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550ve-thermal               d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-c-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-d-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-e-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-g-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot                timer            2arm,armv8-timer       0                                
        reboot-mode          2nvmem-reboot-mode                      reboot-mode                    %         aliases       !  5/soc@0/geniqup@ac0000/i2c@a80000          !  :/soc@0/geniqup@ac0000/i2c@a90000          !  ?/soc@0/geniqup@8c0000/i2c@888000          !  E/soc@0/geniqup@8c0000/i2c@88c000          !  K/soc@0/geniqup@9c0000/i2c@988000          $  Q/soc@0/geniqup@ac0000/serial@a9c000       gpio-keys         
   2gpio-keys         
  rgpio-keys                            default    key-camera-focus            rCamera Focus                                       Y            k         }      key-camera-snapshot         rCamera Snapshot                                     Y            k         }      key-volume-down         rVolume Down            r                         Y            k         }         pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink             ?                                    connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint                        s            port@1                 endpoint                        s                     vph-pwr-regulator            2regulator-fixed         %vph_pwr         4 8u         L 8u                            	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid console-size record-size pmsg-size ecc-size qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names reset-gpios cirrus,asp-sdout-hiz-ctrl #sound-dai-cells gpio-ctrl dlg,cs-gpios regulator-name regulator-min-microvolt regulator-max-microvolt reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction required-opps operating-points-v2 qcom,ice opp-hz #hwlock-cells qcom,gmu memory-region opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label firmware-name qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,ports-sinterval-low gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable qcom,dll-config qcom,ddr-config bus-width sdhci-caps-mask cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc remote-endpoint assigned-clock-parents vdd-supply vdda12-supply orientation-switch snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id power-source bias-pull-up bias-pull-down output-disable color led-sources led-max-microamp flash-max-microamp flash-max-timeout-us function-enumerator #pwm-cells qcom,tune-usb2-disc-thres qcom,tune-usb2-amplitude qcom,tune-usb2-preem vdd18-supply vdd3-supply drive-push-pull output-low qcom,drive-strength linux,code bits wakeup-parent gpio-reserved-ranges #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id regulator-initial-mode #freq-domain-cells opp-peak-kBps thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader i2c0 i2c4 i2c10 i2c11 i2c16 serial0 debounce-interval linux,can-disable wakeup-source orientation-gpios power-role data-role regulator-always-on regulator-boot-on 