 G   8 ;T   (            s ;                                 turing,rk1 rockchip,rk3588                                   +            7Turing Machines RK1    aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /ethernet@fe1c0000           /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0           cpu           arm,cortex-a55                      psci            "          5   
            <   
            L0,         a           q           ~   @                                 @                                                                          "         cpu@100         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                          "         cpu@200         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                          "         cpu@300         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                          "         cpu@400         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                         "         cpu@500         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                         "         cpu@600         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                         "         cpu@700         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                         "   	      idle-states         *psci       cpu-sleep             arm,idle-state           7        H           _   d        p   x                  "            l2-cache-l0           cache           s              @                                                  "         l2-cache-l1           cache           s              @                                                  "         l2-cache-l2           cache           s              @                                                  "         l2-cache-l3           cache           s              @                                                  "         l2-cache-b0           cache           s              @                                                  "         l2-cache-b1           cache           s              @                                                  "         l2-cache-b2           cache           s              @                                                  "         l2-cache-b3           cache           s              @                                                  "            l3-cache              cache           s 0             @                                       "         display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                               "   
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  
sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                         "            gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             <   
           L         5                       !core coregroup stacks                   0         \              ]              ^               
job mmu gpu         -             	  ;disabled               !        "         usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                5                       !ref_clk suspend_clk bus_clk         Botg         J   "   #           Ousb2-phy usb3-phy         
  Yutmi_wide           -               b     R         i                                                   	  ;disabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  $        J   %        Ousb         -             	  ;disabled          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  $        J   %        Ousb         -             	  ;disabled          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  &        J   '        Ousb         -             	  ;disabled          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  &        J   '        Ousb         -             	  ;disabled          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  5     j     i     h     k     r      &  !ref_clk suspend_clk bus_clk utmi pipe           Bhost            J   (         	  Ousb3-phy          
  Yutmi_wide           b     4         i                                          	  ;disabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               
eventq gerror priq cmdq-sync            /         	  ;disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               
eventq gerror priq cmdq-sync            /         	  ;disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                "   l      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                "   g      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                 "   h      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon              Z`                 5             "         syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon              Z       @         5             "   i      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @         "         syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                 "   )      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                "         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                "         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         "         syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +           "      usb2phy@0             rockchip,rk3588-usb2phy                                    5             !phyclk          usb480m_phy0                                 b     m             <phy apb       	  ;disabled            "      otg-port            H          	  ;disabled            "   "            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   5             !phyclk          usb480m_phy2                                 b     o             <phy apb       	  ;disabled            "   $   host-port           H          	  ;disabled            "   %            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   5             !phyclk          usb480m_phy3                                 b     p              <phy apb       	  ;disabled            "   &   host-port           H          	  ;disabled            "   '            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                 "         syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                 "         sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                <                                                                         ]      q                 @  LA .  2Fq )׫ׄ e /  ׄ   e Zр         S   )                              "         i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               5     t     s      	  !i2c pclk            `   *        jdefault                      +            ;okay       regulator@42              rockchip,rk8602            B        x           vdd_cpu_big0_s0                            dp                              +        "      regulator-state-mem                   regulator@43               rockchip,rk8603 rockchip,rk8602            C        x           vdd_cpu_big1_s0                            dp                              +        "      regulator-state-mem                      serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               5                  !baudclk apb_pclk            3   ,      ,           8tx rx           `   -        jdefault         B           L         	  ;disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  !pwm pclk            `   .        jdefault         Y           ;okay            "        pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5                	  !pwm pclk            `   /        jdefault         Y         	  ;disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  !pwm pclk            `   0        jdefault         Y         	  ;disabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5                	  !pwm pclk            `   1        jdefault         Y         	  ;disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                               "   j   power-controller          !    rockchip,rk3588-power-controller                        d            +            ;okay            "       power-domain@8                     d                         +       power-domain@9             	         5     !     #     "             x   2   3   4        d                         +       power-domain@10            
        5     !     #     "        x   5        d          power-domain@11                    5     !     #     "        x   6        d                power-domain@12                    5                       x   7   8   9   :        d          power-domain@13                                 +            d       power-domain@14                  (  5                                 x   ;        d          power-domain@15                     5                            x   <        d          power-domain@16                    5                  x   =   >   ?                     +            d       power-domain@17                     5                            x   @   A   B        d                power-domain@21                    5                                                                                                   x   C   D   E   F   G   H   I   J                     +            d       power-domain@23                    5      C      A             x   K        d          power-domain@14                     5                            x   ;        d          power-domain@15                    5                       x   <        d          power-domain@22                    5                  x   L        d             power-domain@24                    5     [     Z     ]        x   M   N                     +            d       power-domain@25                  8  5                                   Z        x   O        d             power-domain@26                  8  5                                   Q        x   P   Q        d          power-domain@27                  0  5                                      x   R   S   T   U                     +            d       power-domain@28                     5                            x   V   W        d          power-domain@29                  (  5                                 x   X   Y        d             power-domain@30                    5     z     {        x   Z        d          power-domain@31                  @  5     W                                           x   [   \   ]   ^        d          power-domain@33            !        5     W     Z     [        d          power-domain@34            "        5     W     Z     [        d          power-domain@37            %        5          2        x   _        d          power-domain@38            &        5      4      5        d          power-domain@40            (        x   `        d                video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                      w               
vdpu            5                
  !aclk hclk              a        -             iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               v               !aclk iface          5                  -               /            "   a      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                                    t               5                       !aclk hclk sclk          b     r     q     p        <core axi ahb            -             video-codec@fdba0000              rockchip,rk3588-vepu121                                     z               5                
  !aclk hclk              b        -             iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               y               5                  !aclk iface          -               /            "   b      video-codec@fdba4000              rockchip,rk3588-vepu121             @                       |               5                
  !aclk hclk              c        -             iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu             H        @               {               5                  !aclk iface          -               /            "   c      video-codec@fdba8000              rockchip,rk3588-vepu121                                    ~               5                
  !aclk hclk              d        -             iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               }               5                  !aclk iface          -               /            "   d      video-codec@fdbac000              rockchip,rk3588-vepu121                                                   5                
  !aclk hclk              e        -             iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @                              5                  !aclk iface          -               /            "   e      video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               
vdpu            <      A      C        Lׄ ׄ         5      A      C      
  !aclk hclk           -                b                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  5     ]     \     a     b     c     d     [      7  !aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             f        -               S   g           h           i           j      	  ;disabled       ports                        +            "      port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  5     ]     \        !aclk iface          /            -             	  ;disabled            "   f      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    5                       !mclk_tx mclk_rx hclk            <                           3   k            8tx          -               b             <tx-m                      	  ;disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    5     4     4     5        !mclk_tx mclk_rx hclk            <     1                      3   k           8tx          -               b             <tx-m                      	  ;disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   5     0     0     ,        !mclk_tx mclk_rx hclk            <     -                      3   k           8rx          -               b             <rx-m                      	  ;disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                 "   7      qos@fdf35200              rockchip,rk3588-qos syscon              R                 "   8      qos@fdf35400              rockchip,rk3588-qos syscon              T                 "   9      qos@fdf35600              rockchip,rk3588-qos syscon              V                 "   :      qos@fdf36000              rockchip,rk3588-qos syscon              `                 "   Z      qos@fdf39000              rockchip,rk3588-qos syscon                               "   _      qos@fdf3d800              rockchip,rk3588-qos syscon                               "   `      qos@fdf3e000              rockchip,rk3588-qos syscon                               "   \      qos@fdf3e200              rockchip,rk3588-qos syscon                               "   [      qos@fdf3e400              rockchip,rk3588-qos syscon                               "   ]      qos@fdf3e600              rockchip,rk3588-qos syscon                               "   ^      qos@fdf40000              rockchip,rk3588-qos syscon                                "   X      qos@fdf40200              rockchip,rk3588-qos syscon                               "   Y      qos@fdf40400              rockchip,rk3588-qos syscon                               "   R      qos@fdf40500              rockchip,rk3588-qos syscon                               "   S      qos@fdf40600              rockchip,rk3588-qos syscon                               "   T      qos@fdf40800              rockchip,rk3588-qos syscon                               "   U      qos@fdf41000              rockchip,rk3588-qos syscon                               "   V      qos@fdf41100              rockchip,rk3588-qos syscon                               "   W      qos@fdf60000              rockchip,rk3588-qos syscon                                "   =      qos@fdf60200              rockchip,rk3588-qos syscon                               "   >      qos@fdf60400              rockchip,rk3588-qos syscon                               "   ?      qos@fdf61000              rockchip,rk3588-qos syscon                               "   @      qos@fdf61200              rockchip,rk3588-qos syscon                               "   A      qos@fdf61400              rockchip,rk3588-qos syscon                               "   B      qos@fdf62000              rockchip,rk3588-qos syscon                                "   ;      qos@fdf63000              rockchip,rk3588-qos syscon              0                 "   <      qos@fdf64000              rockchip,rk3588-qos syscon              @                 "   K      qos@fdf66000              rockchip,rk3588-qos syscon              `                 "   C      qos@fdf66200              rockchip,rk3588-qos syscon              b                 "   D      qos@fdf66400              rockchip,rk3588-qos syscon              d                 "   E      qos@fdf66600              rockchip,rk3588-qos syscon              f                 "   F      qos@fdf66800              rockchip,rk3588-qos syscon              h                 "   G      qos@fdf66a00              rockchip,rk3588-qos syscon              j                 "   H      qos@fdf66c00              rockchip,rk3588-qos syscon              l                 "   I      qos@fdf66e00              rockchip,rk3588-qos syscon              n                 "   J      qos@fdf67000              rockchip,rk3588-qos syscon              p                 "   L      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                "   5      qos@fdf71000              rockchip,rk3588-qos syscon                               "   6      qos@fdf72000              rockchip,rk3588-qos syscon                                "   2      qos@fdf72200              rockchip,rk3588-qos syscon              "                 "   3      qos@fdf72400              rockchip,rk3588-qos syscon              $                 "   4      qos@fdf80000              rockchip,rk3588-qos syscon                                "   O      qos@fdf81000              rockchip,rk3588-qos syscon                               "   P      qos@fdf81200              rockchip,rk3588-qos syscon                               "   Q      qos@fdf82000              rockchip,rk3588-qos syscon                                "   M      qos@fdf82200              rockchip,rk3588-qos syscon              "                 "   N      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  l      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  5     C     H     >     M     R           )  !aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                          `                    m                      m                     m                     m           #           4           C  0    n  0            K           J   (         	  Opcie-phy            -       "      T                                                       @      	       @         0     
@       @                                     dbi apb config          b     )     .      	  <pwr pipe                         +           ;okay            jdefault         `   o        U   p          legacy-interrupt-controller          a                                                                  "   m         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  5     D     I     ?     N     S     s      )  !aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                          `                    q                      q                     q                     q           #           4           C  @    n  @            K           J   r         	  Opcie-phy            -       "      T                                                       @      
        @         0     
A        @                                     dbi apb config          b     *     /      	  <pwr pipe                         +         	  ;disabled       legacy-interrupt-controller          a                                                                  "   q         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     
macirq eth_wake_irq       (  5     6     7     Y     ^     5      0  !stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -       !        b     $      
  <stmmaceth           S   g        v   )           s                    t           u                 ;okay            output             v        rgmii-rxid          `   w   x   y   z   {        jdefault                        C   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-id001c.c916                       jdefault         `   |        
  :          P        U   }              "   v         stmmac-axi-config           ,                                 6           F           "   s      rx-queues-config            V           "   t   queue0        queue1           tx-queues-config            l           "   u   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  5     b     _     e     T     o        !sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          J   r         	  Osata-phy                                     sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  5     d     a     g     V     q        !sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          J   (         	  Osata-phy                                     spi@fe2b0000              rockchip,sfc                +        @                               5     /     0        !clk_sfc hclk_sfc                         +          	  ;disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                5   
      
   	                  !biu ciu ciu-drive ciu-sample                                jdefault         `   ~                 -       (      	  ;disabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                5                            !biu ciu ciu-drive ciu-sample                                jdefault         `           -       %      	  ;disabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       <     -     .     ,        L n6        (  5     ,     *     +     -     .        !core bus axi block timer                     `                       jdefault       (  b                                 <core bus axi block timer            ;okay                                                                  i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       5      +      /      (        !mclk_tx mclk_rx hclk            <      )      -                            3   ,       ,           8tx rx           -       &        b      *      +      
  <tx-m rx-m            '        jdefault       (  `                                                	  ;disabled          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       5     y     }     u        !mclk_tx mclk_rx hclk            3   ,      ,           8tx rx           b     ^     _      
  <tx-m rx-m            '        jdefault       (  `                                                	  ;disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       5                    !i2s_clk i2s_hclk            <                            3                     8tx rx           -       &        jdefault         `                              	  ;disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       5      %              !i2s_clk i2s_hclk            <      "                      3                    8tx rx           -       &        jdefault         `                              	  ;disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                a        B    a          L     8         W                                         +           "      msi-controller@fe640000           arm,gic-v3-its              d                  W        f           "   n      msi-controller@fe660000           arm,gic-v3-its              f                  W        f           "         ppi-partitions     interrupt-partition-0           q                    "         interrupt-partition-1           q            	        "               dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                z        5      n      	  !apb_pclk                       "   ,      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                z        5      o      	  !apb_pclk                       "         i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            {      	  !i2c pclk                  >               `           jdefault                      +            ;okay       regulator@42              rockchip,rk8602            B        x           vdd_npu_s0                             dp         ~                     +   regulator-state-mem                      i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            |      	  !i2c pclk                  ?               `           jdefault                      +          	  ;disabled          i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            }      	  !i2c pclk                  @               `           jdefault                      +          	  ;disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            ~      	  !i2c pclk                  A               `           jdefault                      +          	  ;disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  !i2c pclk                  B               `           jdefault                      +          	  ;disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               5      T      W        !pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              5      d      c      
  !tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               5                    !spiclk apb_pclk         3   ,      ,           8tx rx                      `                 jdefault                      +          	  ;disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               5                    !spiclk apb_pclk         3   ,      ,           8tx rx                      `                 jdefault                      +          	  ;disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               5                    !spiclk apb_pclk         3                    8tx rx                      `              jdefault                      +            ;okay       pmic@0            rockchip,rk806           B@                                              jdefault         `                                +           +           +           +           +        		   +        	   +        	!   +        	-   +        	9   +        	F           	S   +        	`           	m           	z   +         	        	      dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0            "         dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0            "         dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0            "         regulators     dcdc-reg1                     dp         ~          0        vdd_gpu_s0          	     regulator-state-mem                   dcdc-reg2                              dp         ~          0        vdd_cpu_lit_s0          "      regulator-state-mem                   dcdc-reg3                              
L         q          0        vdd_log_s0     regulator-state-mem                  	 q         dcdc-reg4                              dp         ~          0        vdd_vdenc_s0       regulator-state-mem                   dcdc-reg5                              
L                   0        vdd_ddr_s0     regulator-state-mem                  	 P         dcdc-reg6                             vdd2_ddr_s3    regulator-state-mem          	         dcdc-reg7                                                 0        vdd_2v0_pldo_s3         "      regulator-state-mem          	        	          dcdc-reg8                              2Z         2Z        vcc_3v3_s3     regulator-state-mem          	        	 2Z         dcdc-reg9                             vddq_ddr_s0    regulator-state-mem                   dcdc-reg10                             w@         w@        vcc_1v8_s3     regulator-state-mem          	        	 w@         pldo-reg1                              w@         w@        avcc_1v8_s0    regulator-state-mem                   pldo-reg2                              w@         w@        vcc_1v8_s0     regulator-state-mem                  	 w@         pldo-reg3                              O         O        avdd_1v2_s0    regulator-state-mem                   pldo-reg4                              2Z         2Z          0        vcc_3v3_s0     regulator-state-mem                   pldo-reg5                              w@         2Z          0        vccio_sd_s0    regulator-state-mem                   pldo-reg6                              w@         w@      	  pldo6_s3       regulator-state-mem          	        	 w@         nldo-reg1                              q         q        vdd_0v75_s3    regulator-state-mem          	        	 q         nldo-reg2                              P         P        vdd_ddr_pll_s0     regulator-state-mem                  	 P         nldo-reg3                              q         q        avdd_0v75_s0       regulator-state-mem                   nldo-reg4                              P         P        vdd_0v85_s0    regulator-state-mem                   nldo-reg5                              q         q        vdd_0v75_s0    regulator-state-mem                            spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               5                    !spiclk apb_pclk         3                    8tx rx                      `                 jdefault                      +          	  ;disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               5                    !baudclk apb_pclk            3   ,      ,   	        8tx rx           `           jdefault         L           B         	  ;disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               5                    !baudclk apb_pclk            3   ,   
   ,           8tx rx           `           jdefault         L           B           ;okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               5                    !baudclk apb_pclk            3   ,      ,           8tx rx           `           jdefault         L           B         	  ;disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               5                    !baudclk apb_pclk            3      	      
        8tx rx           `           jdefault         L           B         	  ;disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               5                    !baudclk apb_pclk            3                    8tx rx           `           jdefault         L           B         	  ;disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               5                    !baudclk apb_pclk            3                    8tx rx           `           jdefault         L           B         	  ;disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               5                    !baudclk apb_pclk            3   k      k           8tx rx           `           jdefault         L           B         	  ;disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               5                    !baudclk apb_pclk            3   k   	   k   
        8tx rx           `           jdefault         L           B         	  ;disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               5                    !baudclk apb_pclk            3   k      k           8tx rx           `           jdefault         L           B           ;okay          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      L      K      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      L      K      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      O      N      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      O      N      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      R      Q      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  !pwm pclk            `           jdefault         Y         	  ;disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      R      Q      	  !pwm pclk            `           jdefault         Y         	  ;disabled          thermal-zones      package-thermal         
             
            
$          trips      package-crit            
4 8        
@          	  critical                bigcore0-thermal            
    d        
            
$         trips      bigcore0-alert          
4 L        
@          passive         "         bigcore0-crit           
4 8        
@          	  critical             cooling-maps       map0            
K           
P                  bigcore2-thermal            
    d        
            
$         trips      bigcore2-alert          
4 L        
@          passive         "         bigcore2-crit           
4 8        
@          	  critical             cooling-maps       map0            
K           
P      	            littlecore-thermal          
    d        
            
$         trips      littlecore-alert            
4 L        
@          passive         "         littlecore-crit         
4 8        
@          	  critical             cooling-maps       map0            
K         0  
P                        center-thermal          
             
            
$         trips      center-crit         
4 8        
@          	  critical                gpu-thermal         
    d        
            
$         trips      gpu-alert           
4 L        
@          passive         "         gpu-crit            
4 8        
@          	  critical             cooling-maps       map0            
K           
P               npu-thermal         
             
            
$         trips      npu-crit            
4 8        
@          	  critical                   tsadc@fec00000            rockchip,rk3588-tsadc                                                     5                    !tsadc apb_pclk          <              L         b      V      W        <tsadc-apb tsadc         
_         
v            
            `           
           jdefault sleep           
           ;okay            "         adc@fec10000              rockchip,rk3588-saradc                                                    
           5                    !saradc apb_pclk         b      U        <saradc-apb        	  ;disabled          i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  !i2c pclk                  C               `           jdefault                      +            ;okay       rtc@51            haoyu,hym8563              Q                    hym8563         jdefault         `                                      
         i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  !i2c pclk                  D               `           jdefault                      +          	  ;disabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  !i2c pclk                  E               `           jdefault                      +          	  ;disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               5                    !spiclk apb_pclk         3   k      k           8tx rx                      `                 jdefault                      +          	  ;disabled          efuse@fecc0000            rockchip,rk3588-otp                               5                                !otp apb_pclk phy arb            b                          <otp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        
            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                z        5      p      	  !apb_pclk                       "   k      phy@fed60000              rockchip,rk3588-hdptx-phy                                 5          T        !ref apb         H          8  b     #          c     d     e     !     "      "  <phy apb init cmn lane ropll lcpll           S         	  ;disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                H           5          l     V           !refclk immortal pclk utmi         (  b                                     <init cmn lane pcs_apb pma_apb           
                                  '         	  ;disabled            "   #      phy@fee00000              rockchip,rk3588-naneng-combphy                               5          v     W        !ref apb pipe            <             L         H           b     <     C        <phy apb         7   )        I         	  ;disabled            "   r      phy@fee20000              rockchip,rk3588-naneng-combphy                               5          x     W        !ref apb pipe            <             L         H           b     >     E        <phy apb         7   )        I           ;okay            "   (      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                  S                        +           "      gpio@fd8a0000             rockchip,gpio-bank                                                    5     q     r         	        _                        a        	                      "         gpio@fec20000             rockchip,gpio-bank                                                    5      s      t         	        _                        a        	                    gpio@fec30000             rockchip,gpio-bank                                                    5      u      v         	        _          @             a        	                      "        gpio@fec40000             rockchip,gpio-bank                                                    5      w      x         	        _          `             a        	                      "   }      gpio@fec50000             rockchip,gpio-bank                                                    5      y      z         	        _                       a        	                      "   p      pcfg-pull-up             k        "         pcfg-pull-down           x        "         pcfg-pull-none                   "         pcfg-pull-none-drv-level-2                              "         pcfg-pull-up-drv-level-1             k                   "         pcfg-pull-up-drv-level-2             k                   "         pcfg-pull-none-smt                            "         auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                "         emmc-bus8                                                                                                                   "         emmc-clk                                "         emmc-cmd                                 "         emmc-data-strobe                                "            eth1          fspi          gmac1      gmac1-miim                                           "   w      gmac1-rx-bus2         0                                	              "   y      gmac1-tx-bus2         0                                              "   x      gmac1-rgmii-clk                                          "   z      gmac1-rgmii-bus       @                                                           "   {         gpu       hdmi          i2c0       i2c0m2-xfer                                            "   *         i2c1       i2c1m2-xfer                    	             	           "            i2c2       i2c2m0-xfer                    	             	           "            i2c3       i2c3m0-xfer                   	            	           "            i2c4       i2c4m0-xfer                   	            	           "            i2c5       i2c5m0-xfer                   	            	           "            i2c6       i2c6m0-xfer                    	             	           "            i2c7       i2c7m0-xfer                   	            	           "            i2c8       i2c8m0-xfer                   	            	           "            i2s0       i2s0-lrck                               "         i2s0-sclk                               "         i2s0-sdi0                               "         i2s0-sdi1                               "         i2s0-sdi2                               "         i2s0-sdi3                               "         i2s0-sdo0                               "         i2s0-sdo1                               "         i2s0-sdo2                               "         i2s0-sdo3                               "            i2s1       i2s1m0-lrck                             "         i2s1m0-sclk                             "         i2s1m0-sdi0                             "         i2s1m0-sdi1                             "         i2s1m0-sdi2                             "         i2s1m0-sdi3                             "         i2s1m0-sdo0               	              "         i2s1m0-sdo1               
              "         i2s1m0-sdo2                             "         i2s1m0-sdo3                             "            i2s2       i2s2m1-lrck                             "         i2s2m1-sclk                             "         i2s2m1-sdi                
              "         i2s2m1-sdo                              "            i2s3       i2s3-lrck                               "         i2s3-sclk                               "         i2s3-sdi                                "         i2s3-sdo                                "            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                      "            pmu       pwm0       pwm0m0-pins                              "   .      pwm0m2-pins                             "           pwm1       pwm1m0-pins                              "   /         pwm2       pwm2m0-pins                              "   0         pwm3       pwm3m0-pins                              "   1         pwm4       pwm4m0-pins                              "            pwm5       pwm5m0-pins                	              "            pwm6       pwm6m0-pins                              "            pwm7       pwm7m0-pins                              "            pwm8       pwm8m0-pins                             "            pwm9       pwm9m0-pins                             "            pwm10      pwm10m0-pins                                 "            pwm11      pwm11m0-pins                                "            pwm12      pwm12m0-pins                                "            pwm13      pwm13m0-pins                                "            pwm14      pwm14m0-pins                                "            pwm15      pwm15m0-pins                                "            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                   "            sdmmc      sdmmc-bus4        @                                                          "         sdmmc-clk                               "   ~      sdmmc-cmd                               "         sdmmc-det                                "            spdif0        spdif1        spi0       spi0m0-pins       0                                                 "         spi0m0-cs0                               "         spi0m0-cs1                               "            spi1       spi1m1-pins       0                                              "         spi1m1-cs0                              "         spi1m1-cs1                              "            spi2       spi2m2-pins       0                                                 "         spi2m2-cs0                 	              "            spi3       spi3m1-pins       0                                              "         spi3m1-cs0                              "         spi3m1-cs1                              "            spi4       spi4m0-pins       0                                              "         spi4m0-cs0                              "         spi4m0-cs1                              "            tsadc      tsadc-shut-org                               "            uart0      uart0m1-xfer                                 	              "   -         uart1      uart1m1-xfer                      
            
           "            uart2      uart2m0-xfer                       
             
           "            uart3      uart3m1-xfer                      
            
           "            uart4      uart4m1-xfer                      
            
           "            uart5      uart5m1-xfer                      
            
           "            uart6      uart6m1-xfer                       
            
           "            uart7      uart7m1-xfer                      
            
           "            uart8      uart8m1-xfer                      
            
           "            uart9      uart9m0-xfer                      
            
           "            vop       bt656         gpio-func      tsadc-gpio-func                               "            eth0          gmac0         fan    fan-int                               "           hym8563    hym8563-int                               "            pcie2      pcie2-reset                              "   o         pcie3      pcie3-reset                              "         pcie3-reg                                "           rtl8211f       rtl8211f-rst                                 "   |            usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                5                       !ref_clk suspend_clk bus_clk         Botg         J                 Ousb2-phy usb3-phy         
  Yutmi_wide           -               b     S         i                                 	  ;disabled          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                "        syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                 "        syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         "         syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +           "      usb2phy@4000              rockchip,rk3588-usb2phy           @                        5             !phyclk          usb480m_phy1                                 b     n             <phy apb       	  ;disabled            "      otg-port            H          	  ;disabled            "               i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      5                       !mclk_tx mclk_rx hclk            <                           3   k           8tx          -               b             <tx-m                      	  ;disabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      5     9     9     ?        !mclk_tx mclk_rx hclk            <     6                      3   k           8tx          -               b             <tx-m                      	  ;disabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      5     +     +     '        !mclk_tx mclk_rx hclk            <     (                      3   k           8rx          -               b             <rx-m                      	  ;disabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    5     &     &     "        !mclk_tx mclk_rx hclk            <     #                      3   k           8rx          -               b             <rx-m                      	  ;disabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        0  5     @     E     ;     J     O     t      )  !aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                           
sys pmc msg legacy err                                          `                                                                                               #            4           C                      K           J         	  Opcie-phy            -       "      T                                                       @      	        @         0     
@        @                                     dbi apb config          b     &     +      	  <pwr pipe            ;okay            jdefault         `           U   p                     legacy-interrupt-controller          a                                                                 "            pcie-ep@fe150000              rockchip,rk3588-pcie-ep       P     
@             
@                         	        @      
@0                 dbi dbi2 apb addr_space atu       0  5     @     E     ;     J     O     t      )  !aclk_mst aclk_slv aclk_dbi pclk aux pipe                                                                                                                                       +  
sys pmc msg legacy err dma0 dma1 dma2 dma3          4           K           J         	  Opcie-phy            -       "        b     &     +      	  <pwr pipe          	  ;disabled          pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  5     A     F     <     K     P     u      )  !aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                              
sys pmc msg legacy err                                          `                                                                                               #           4           C                    K           J         	  Opcie-phy            -       "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config          b     '     ,      	  <pwr pipe          	  ;disabled       legacy-interrupt-controller          a                                                                  "            pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  5     B     G     =     L     Q           )  !aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                          `                                                                                               #           4           C       n               K           J            	  Opcie-phy            -       "      T                                                       @      	       @         0     
@       @                                     dbi apb config          b     (     -      	  <pwr pipe                         +         	  ;disabled       legacy-interrupt-controller          a                                                                  "            ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     
macirq eth_wake_irq       (  5     6     7     X     ]     4      0  !stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         -       !        b     #      
  <stmmaceth           S   g        v   )                                                         	  ;disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           ,                                 6           F           "         rx-queues-config            V           "      queue0        queue1           tx-queues-config            l           "      queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  5     c     `     f     U     p        !sata pmalive rxoob ref asic                                 +          	  ;disabled       sata-port@0                      @          J            	  Osata-phy                                     phy@fed90000              rockchip,rk3588-usbdp-phy                                H           5          m     W           !refclk immortal pclk utmi         (  b                                     <init cmn lane pcs_apb pma_apb           
                                  '         	  ;disabled            "         phy@fee10000              rockchip,rk3588-naneng-combphy                               5          w     W        !ref apb pipe            <             L         H           b     =     D        <phy apb         7   )        I        	  ;disabled            "         phy@fee80000              rockchip,rk3588-pcie3-phy                                H            5     y        !pclk            b     H        <phy         7   )                  ;okay            "         opp-table-cluster0            operating-points-v2                  "      opp-1008000000              <          
L 
L ~          @      opp-1200000000              G          
4 
4 ~          @      opp-1416000000              Tfr            ~          @               opp-1608000000              _"          P P ~          @      opp-1800000000              kI          ~ ~ ~          @         opp-table-cluster1            operating-points-v2                  "      opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-cluster2            operating-points-v2                  "      opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table             operating-points-v2         "   !   opp-300000000                         
L 
L P      opp-400000000               ׄ          
L 
L P      opp-500000000               e          
L 
L P      opp-600000000               #F          
L 
L P      opp-700000000               )'          
` 
` P      opp-800000000               /          q q P      opp-900000000               5          5  5  P      opp-1000000000              ;          P P P         pwm-fan           pwm-fan         $          _                 3   +        jdefault         `                                      >        P                     vcc3v3-pcie30-regulator           regulator-fixed         vcc3v3_pcie30            2Z         2Z         C        [                 jdefault         `          V          "         vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                             LK@         LK@        "   +      vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc_1v1_nldo_s3                                                +        "         chosen          gserial9:115200n8             	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 ethernet0 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names power-domains status dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos iommus reg-names rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes reset-gpios interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode rx_delay tx_delay reset-assert-us reset-deassert-us snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply gpio-controller #gpio-cells pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells wakeup-source bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins vpcie3v3-supply rockchip,phy-grf opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend cooling-levels fan-supply pwms enable-active-high startup-delay-us stdout-path 